Fewer parameters did not make inference faster until the sparsity pattern was learned to match the hardware
AspireAI community · arXiv
Sparse-plus-low-rank representations let one checkpoint compress to several memory budgets, but unstructured sparsity carries indexing overhead and irregular memory access that can eat the computational savings. S-SALAAD jointly learns the model weights and their low-rank and structured sparse components during training, supports a family of hardware-compatible structured sparsity patterns, and pairs that structure learning with budget-aware compression plus dedicated CPU and GPU kernels that exploit the learned structure for acceleration. Across Llama2 and Qwen3 models in both pretraining and distillation settings, it advanced the empirical Pareto frontier in perplexity, memory and inference latency on multiple hardware platforms against the evaluated baselines. The honest limitation is that the paper reports frontier movement rather than a single headline number, and the gains are relative to the specific baselines the authors ran, so the practical question for a reader is whether a specific model and target device clear their own bar.
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Two sparse-autoencoder analyses have resisted scaling: matching semantically similar features across layers, and compressing large feature circuits into interpretable supernodes. This paper argues both are the same underlying problem, estimating semantic distances between SAE features that sit on different activation manifolds. Its representation treats each feature not as a single decoder vector but as an activation-weighted distribution over the hidden states expressing it, projects those distributions into a shared reference space, and compares them with Wasserstein distance. The representation is proved invariant to activation rescaling and stable under perturbation, and recovers true matches under finite-sample margin conditions. Empirically it outperformed decoder-vector and LLM-based baselines and captured subtle functional distinctions between related features, and it compressed large feature circuits into interpretable supernodes automatically. The limitation is that this is interpretability tooling: the paper demonstrates better feature matching and circuit compression, not that downstream interpretability claims become more accurate.