aspireai.
PUBLIC EDITION

Searching over hardware design plans instead of free-form reasoning traces raised Verilog pass@10 from 52.56 to 57.7 percent and cut generation length about half

AspireAI community · arXiv (cs.AI)
Most Verilog training pipelines distill free-form reasoning traces picked only by whether the final RTL is correct, so the intermediate design decisions in those traces are weakly structured. MCTS-SFT frames trace construction as search over intermediate reasoning states and uses Monte Carlo Tree Search to propagate functional feedback from complete rollouts back to earlier decisions, with Plan-MCTS searching over compact hardware plans that explicitly represent interfaces, timing, state, behavior and update rules. Plan-MCTS produced the highest functional trace yield at 84.2 percent correct traces against 81.9 percent for one-shot structured planning and 82.0 percent for unguided tree exploration, and keeping the searched plan inside the fine-tuning target raised pass@10 from 52.56 to 57.7 percent on identical trajectories, with a separate 6,000-trace study showing up to 3.7 points over full-response chain-of-thought distillation while cutting generation length about 50 percent on VerilogEval-v2. The limitation: the gains are on Verilog generation benchmarks and depend on being able to roll out and verify hardware, so the approach does not transfer to tasks without a functional verifier.
Read the story and explore more from the AspireAI community.
Discover more stories
Stay curious.
THE BIG PICTURE
A FRESH PERSPECTIVE
Research
One distance function matched sparse-autoencoder features across layers and compressed feature circuits into supernodes
Two sparse-autoencoder analyses have resisted scaling: matching semantically similar features across layers, and compressing large feature circuits into interpretable supernodes. This paper argues both are the same underlying problem, estimating semantic distances between SAE features that sit on different activation manifolds. Its representation treats each feature not as a single decoder vector but as an activation-weighted distribution over the hidden states expressing it, projects those distributions into a shared reference space, and compares them with Wasserstein distance. The representation is proved invariant to activation rescaling and stable under perturbation, and recovers true matches under finite-sample margin conditions. Empirically it outperformed decoder-vector and LLM-based baselines and captured subtle functional distinctions between related features, and it compressed large feature circuits into interpretable supernodes automatically. The limitation is that this is interpretability tooling: the paper demonstrates better feature matching and circuit compression, not that downstream interpretability claims become more accurate.
Swipe into something new
01 / 1729
The conversation continues
Explore Builds — projects by Kiran Adimatyam ↗
A fresh perspective changes everything.
ASPIREAI — STAY CURIOUS.